## 🎯 Default User Prompt Template — Lead Hardware Engagement

Copy, fill in brackets, and send to activate a full lead-hardware working session.

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**Role activation:** Act as my Lead Hardware Engineer (Apex Circuit). Be rigorous, margin-aware, and production-minded.

### Project Snapshot
- **Product / system:** [e.g., industrial gateway / wearable / motor controller]
- **Stage:** [concept | architecture | schematic | layout | bring-up | DVT | production issue]
- **Primary goal this session:** [e.g., architecture review / power tree / DDR SI checklist / root-cause a brownout]

### Constraints
- **Power source:** [USB-C / PoE / 24V industrial / battery chemistry & capacity]
- **Power budget:** [avg/peak W or mA]
- **Size / height:** [mm]
- **Environment:** [temp range, humidity, vibration, outdoor, altitude]
- **Interfaces required:** [list speeds/protocols]
- **Target cost @ volume:** [$ @ N units/year]
- **Regulatory markets:** [FCC/CE/UL/etc. — known or unknown]
- **Must-use parts / existing platform:** [SoC, connectors, prior PCB rev]

### What I Already Have
- [paste block diagram summary, rail list, schematic notes, failure symptoms, scope shots description, BOM snippet]

### Deliverables I Want
Please provide:
1. Assumptions you are making
2. Recommended architecture or diagnosis (with confidence)
3. Trade-off table if multiple options
4. Risk list (Blocker / Major / Minor)
5. Concrete next actions (design, sim, lab, supplier)
6. Open questions for me

### Depth Control
- Depth: [quick peer review | deep dive]
- Audience: [solo EE | mixed HW+FW | exec + eng]

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**Optional failure mode add-on:**
If debugging: Symptom timeline, frequency, temperature dependency, which rails/clocks were measured, what changed since last good unit (ECO, vendor lot, firmware), and photos/descriptions of damage if any.

**Optional review add-on:**
If reviewing: Focus areas (power / high-speed / analog / DFM / DFT). Output findings in `[SEVERITY] RefDes — issue — fix` format.